Intellitech has developed revolutionary patented technology for use by electronic product manufacturers and the semiconductor industry. Using a unique business model, Intellitech Corporation develops and licenses advanced Intellectual Property (IP) for efficient configuration, debug and test of electronic products including SoC (System-on-a-Chip), ICs, PCBs and Systems. The proprietary IP provides a scalable configuration, debug, and test infrastructure that enables customers to build high quality self-testable and in-the-field re-configurable products. Intellitech's unified approach to test and configuration enables customers to provide field adaptable products, lower their manufacturing test costs, lower their field support costs, and extend their products' useful life with field upgrade-able logic.
|Device Vendor Support|
|Intellitech tools can program the entire Altera family of FPGAs and CPLDs. Intellitech's SystemBIST IC can configure Altera devices via JTAG/1149.1 or 8 bit parallel bus.||Intellitech tools can program the entire Xilinx family of FPGA's and CPLD's. Intellitech's BER (Bit Error Rate ) Test IP is compatible with Xilinx SERDES connections. Intellitech's SystemBIST device can program Xilinx FPGAs through JTAG and through the 8 bit configuration bus.||Intellitech tools can program the entire Lattice family. Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic devices, or PLDs, and related software.||Numonyx FLASH can be programmed with Intellitech tools. Intellitech's patented FLASH programming technology offers the industries' fastest on-board programming solution. Numonyx offers a variety of flash memory hardware, software and packaging solutions designed to meet the diverse needs of embedded system designers.||Spansion FLASH can be programmed with Intellitech tools. Intellitech's patented FLASH programming technology offers the industries' fastest on-board programming solution. Spansion Flash memory is the backbone behind many of today's technology appliances including cell phones, pagers, and automotive control systems.|
Intellitech product portfolio range includes the below range of products
- 1149.1 Boundary Scan Test Development Software
- Eclipse™ - Boundary Scan Test Development System
- ScanExecutive™ - Boundary Scan for Production
- ScanExecutiveT - Scan Diagnostics & Repair
- TEST-IP™ Product Family
- PCB/System Built-In Self-Test - SystemBist
- Scan Ring Linker SRL™
- In-System FLASH Programming Solution Using the FAC™
- CJTAG for System JTAG and Multi-Drop 1149.1 (JTAG)
- Nebula Family for iJTAG
- PT100 Concurrent JTAG Tester
- Anti Cloning - Chip ID & Security
Intellitech's EclipseT Family of Products is a Complete Solution for Design Debug, In-system Device Configuration and Automated Test Program Development for Complex PCBs and Systems. The Eclipse Family provides design and test engineers with a comprehensive set of tools that they can use to create, validate and apply 1149.1 (JTAG) based system configuration and test suites. All tests can be passed to SystemBIST for embedded test, to Teradyne ICT or to Intellitech manufacturing systems. The Eclipse family has an extensive line of ultra fast hardware and integrated software options for 1149.1 (JTAG) test and configuration. The Eclipse Family is a comprehensive test solution that reduces product development costs, speeds time-to-market and improves product quality. Eclipse products enable companies to develop and execute manufacturing tests and perform in-system device programming and configuration using the IEEE 1149.1 test infrastructure. The Eclipse™ Boundary Scan Test Development System is a Complete Solution for Test, Debug and In-System Configuration of Boundary Scan (IEEE 1149.1/JTAG) based PCB’s and Systems) Intellitech's Boundary Scan software is called the Eclipse Test Development Environment (TDE). The Eclipse TDE is part of a holistic solution that provides all the features that are required to test ‘real world’ printed circuit boards. This including important essential capabilities such as boundary scan 1149.1 IC to IC interconnect testing, memory interconnect testing, on-board FLASH programming, in-system programming for FPGAs, CPLD programming, schematic based debugging, robust pin level diagnostics, open-source JTAG scan scripting, LabView JTAG VIs and built-in PXI/VXI/GPIB instrument support. Eclipse scales to any size design that conforms to the JTAG/1149.1 standard. Have a small PCB with a few BGA devices ? Prices start at $895.00 for Eclipe "small PCB". The Eclipse TDE provides engineers with a comprehensive set of powerful tools that they can use to bring up and debug new designs as well as create, validate and apply IEEE 1149.1 based configuration and test suites. Manufacturing test Boundary Scan for Production : ScanExecutive™ is a Flexible and Easy-to-Use Production Test Environment for Complex PCBs with Boundary Scan. Eclipse ScanExecutive is a Production PCB Test platform that enables production personnel to execute PCB test programs in a manufacturing environment using a variety of cost-effective IEEE 1149.1 test hardware solutions. Using ScanExecutive supervisors, technicians and operators can easily apply IC to IC infrastructure tests, IC to memory interconnect tests, non-boundary scan cluster tests, FPGA /CPLD configuration suites, and program FLASH memories in-system without in-depth knowledge of IEEE 1149.1. ScanExecutive has been designed so that tests developed using the EclipseTM Test Development Environment - Scan Path Integrity Test (SPIT), Virtual Interconnect Test (VIT), FLASH programming, CPLD programming and Virtual Component Cluster Test (VCCT) can be seamlessly applied to a Unit Under Test (UUT) in predefined flows that are controlled with ScanExecutive's flexible Scripting language based on industry standard TCL/TK. Intellitech enables you to merge JTAG tests with GPIB/VISA and USB Instruments wtihout adding the cost of an additional runtime such as Labview or HP VEE. With the PT100 Parallel Tester option, ScanExecutive can easily keep up with shrinking production cycle times for even the longest test and on-board programming times (See Concurrent JTAG) Learn more about ScanExecutive™... PT100 Parallel Tester - Industry's highest throughput digital test and configuration tester Learn more ...
Boundary Scan (DFT) Design-for-Test is easy with Intellitech's TEST-IP Family The TEST-IP Family is patented infrastructure Intellectual Property. The IP is embedded into a design, provided as an IC or temporarily loaded into an FPGA. The appraoch provides a scalable, re-usable and unified configuration and test methodology, which enables design teams to produce high-quality self-testable and in-the-field re-configurable products that are tamper resistant. Since there is a clear seperation of design and support infrastructure, each generation product can re-use the infrastructure without re-integration and re-work TEST-IP Infrastructure The Infrastructure IP is independent of the functional design and takes the form factor of an individual IC, soft macro or binary bitstream for embedding in FPGA/CPLD devices. The TEST-IP family provides pre-engineered and proven infrastructure for embedded configuration and test, fast in-system FLASH programming and scan chain management for PCB and systems. Unified Configuration and Test using IEEE 1149.1 (JTAG) The TEST-IP Family leverages the IEEE 1149.1 industry standard test bus as a single unified data (configuration and test) application vehicle. This unified approach to configuration and test lowers manufacturing test costs, simplifies field support and extends a product's useful life. The TEST-IP infrastructure IP is scalable and can be reused during all phases of the product life cycle and from one product design to the next. EclipseTM Test Development Environment Supports TEST-IP Device configuration data and embedded manufacturing tests are created and validated using the Eclipse Test Development Environment. The verified data is loaded into FLASH memory and applied to the system at power-up using the IEEE 1149.1 test bus. TEST-IP Family of Infrastructure IP Products The SystemBIST configuration and self-test devices- is a complete plug-and-play IP module built upon a unique patented architecture. The SystemBIST device is embedded onto a PCB, which enables design engineers to build high quality, self-testable and in-the-field re-configurable products. SystemBIST is vendor independent and can configure any IEEE 1532 or IEEE 1149.1 compliant FPGA and CPLD in-system.Learn more ..... The Fast Access Controller FAC™ - is a patented pre-engineered IP solution for processor (Micro-controller, DSP or CPU) and ASIC/SoC designers who need to respond to customer demands for better Design-for-Test and improved support and programming performance for external FLASH in a production environment. The FAC provides the fastest way to program on-board Flash memory, especially when it is connected to an FPGA. A small bitstream is loaded which enables the FLASH to receive programming data over the 1149.1 bus.Learn more ..... The Scan Ring Linker SRL™ - is a complete IP module that can be easily embedded into a CPLD, FPGA or ASIC on a PCB to reduce the complexities and costs of designing 1149.1 (JTAG) test infrastructure for designs that use multiple scan rings. The SRL IP module links any number of scan rings (secondary scan paths) into a single high-speed test bus, which permits devices on secondary scan chains to be independently tested and configured through a single 1149.1 external interface.Learn more ..... TheCJTAG for System JTAG and Multi-Drop 1149.1 (JTAG) - The CJTAG IC is a member of the Intellitech TEST-IP family of infrastructure IP products. The TEST-IP product family facilitates test, debug and in-system programming of ICs, PCBs and multi-PCB systems. CJTAG provides multiple scan rings at the PCB level and scan access to each PCB at the system level. Each CJTAG IC is an addressable gateway to the PCBs in a multi-drop system. The CJTAG IC has flexible secondary scan-chains, buffering and voltage level shifting for 4 to 12 local scan-chains. Unlike earlier commercial ICs such as Scan Bridge, STA112, STA111 and ASP, CJTAG enables simultaneous test of all of the similar PCBs in the system using Intellitech's CJTAG Concurrent JTAG Bus. CJTAG also has patented address 'aliasing' not found in other multi-drop bus components which critical for reducing PCB-to-PCB level interconnect tests in dynamic systems. The CJTAG addressing approach overcomes the fixed addressing of Scan Bridge and ASP enabling re-use of board-to-board interconnect and SERDES BER tests.. Learn more ..... TEST-IP Family Benefits
- TEST-IP is a 'codeless' plug-and-play infrastructure that can configure any IEEE 1532 compliant programmable device in-system from a single source
- TEST-IP significantly reduces product parts cost (eliminates FPGA configuration PROMs and voltage translators parts on multi-scan chain design)
- TEST-IP family lessens the time spent on designing ad-hoc mechanisms for in-system device configuration and programming, system bring-up and debug, board interconnect test and at-speed memory test
- TEST-IP can execute deterministic embedded test at anytime and anywhere without the need to be connected to ATE
- TEST-IP reduces in-system FLASH programming times
- TEST-IP is fully integrated with the Eclipse Test Development Environment so that configuration and test suites can be created and validated before they are committed to the system
Intellitech PCB/System Built-In Self-Test - SystemBist
SystemBist - Flexible FPGA configuration for Xilinx and Altera FPGAs with Security and PCB BIT (Built-in-Test) Capability SystemBIST provides the worlds first deterministic BIST (Built-In Self Test) for PCBs and entire systems. SystemBIST BIST removes much of the work required for a system level BIT (Built-In-Test) created with firmware/software. SystemBIST re-uses the manufacturing JTAG/IEEE 1149.1 based test patterns and scripts and embeds them in the PCB. The tests and FPGA configuration choices are stored compressed in FLASH memory enabling PCBs to be tested anywhere that they can be powered. SystemBIST is a complete plug-and-play IC for flexible FPGA configuration and embedded JTAG test built upon several unique patented architectures. SystemBIST is a code-less configuration device which enables design engineers to build high quality, self-testable and in-the-field re-configurable products. SystemBIST is vendor independent and can configure any IEEE 1532 or IEEE 1149.1 compliant FPGA. System CPLDs, EEPROMs and FLASH can also be re-programmed in the field with SystemBIST through other members of Intellitech's TEST-IP family. Find out how SystemBIST helped LTX with their on-board FPGA configuration and test strategy here : SystemBIST simplifies FPGA configuration. See SystemBIST in Xilinx XCELL Journal. Read the white paper on Business considerations for FPGA based PCBs. The white paper presents information on FPGA security, trojan bitstreams, PCB cloning and other factors designers should be aware of when designing PCBs with FPGAs. AES encryption doesn't prevent trojan bitstreams from being loaded into your commodity FLASH or FPGAs. FPGA Security Learn more about SystemBist
In-System FLASH Programming Solution Using the FAC™
Fast Access Controller (FAC) The Fast Access Controller (FAC) is a member of the Intellitech TEST-IP™ family of pre-designed infrastructure intellectual property modules for high-speed, high-throughput, in-system configuration and test. The FAC leverages the 1149.1 test infrastructure to enable in-system programming of FLASH memory devices as fast as off-board or direct access programming techniques. The patent-pending FAC FLASH programming method is scalable, it can still achieve this optimal FLASH programming throughput with low test clock rates (<3Mhz) and is unaffected by the size or number of 1149.1 devices in the boundary-scan chain design of the PCB. Learn More ....
Nebula Family for iJTAG
Develop - Simulate - Validate JTAG/IJTAG Silicon Instruments using NEBULA You can Register Here to download NEBULA 6.11. This is not a trial software or an evaluation, it is free to use. We ask that you provide valid information on who you are, a work email address and if you find it useful, tell a friend or co-worker about NEBULA. Consultants and 3rd parties are encouraged to get involved and use the extensible PDL and TCL language to add new value added capabilities to NEBULA or to develop JTAG controlled IP. If you are already a verified registered user then you can proceed directly to the download page. Learn more .....
Anti Cloning - Electronic Chip ID & Security - The Problem and the Need The problem Unless your company designs an ASIC for a product, any third party that has access to the assembled product can create a succesful counterfeit. Commodity parts, Flash devices, FPGAs and other components can be purchased by the counterfeiter. If the gerber files for the PCB are not readily available, components can be removed from the PCB and a netlist generated from point-to-point reverse engineering. Programmable components can be copied and programmed essentially the same way that is done on the legitimate product. Doesn't sound possible? Take a look at the photo to the right. Most contract manufacturers and their employees are honest hardworking teams and are using your product data just to perform their work. However, it just takes one disgruntled part-time employee, second shift employee or soon-to-be ex-employee to put your product at risk. All of the data files needed to manufacture and program your product, gerber files, FPGA programming files, CPU object code and yes even FPGA security keys fit on a easy to use USB drive. Additional logistic steps to protect your keys and flash data are costly. For instance programming each PCB at the OEM and then re-shipping back to the CM for final assembly. What's the risk? Online re-sellers and online auction sites like e-bay provide easy outlets to sell counterfeits of your electronic product. The Need Your product needs a unique serial number accessible in-system to manage software updates and controlling feature access. Some CPUs used for digital rights management of videos and MP3 have a unique serial number. A Spartan 3AN has a unique value but that may be overkill for your design. You may be able to add a serial EEPROM to the design with a unique value. But manufacturing doesn't have an easy way to accomplish programming each one. It is still easy to duplicate a serial number or change it, in a commodity flash. You want to automate your production line and save time and expense of not needing to add serial number bar-codes for each PCB. There are extra costs associated with getting a unique 1D or 2D bar-code on each PCB. If you need a part to link scan-chains, Intellitech's solution will solve both problems for less cost. The Intellitech SolutionIntellitech's ICs now come with an ECID, Electronic Chip Identification. Each IC has its own unique serial number which can be used as a PCB level serial number. This serial number is printed on the IC (where space permits) and can be used to follow the history of the IC or PCB on Intellitech's website. Any of our IC's test history can be examined by knowing your customer ID and the serial number of the IC. Each IC contains the customer's unique code and the code of the company that placed the order (this is typically the CM). Each IC has an non-reversible unique 128 bit number (Xilinx calls Virtex-6 Device DNA) and a SHA256 bit hash of your data, secret key and 128 bit number. Your embedded software may use these values to establish authenticity and to provide a unique product ID for maintaining customer updates and access to software features. The values are read-only accessible through SPI, I2C or JTAG . If your embedded software has internet access, it may re-validate these unique numbers via hash calculation or by making a simple call to our website. Learn more .....